Architecture >> AxiStreamGearboxTb::mapping

Constants
MAX_NUM_BYTES_C	positive := ite ( M_TDATA_NUM_BYTES> S_TDATA_NUM_BYTES , M_TDATA_NUM_BYTES , S_TDATA_NUM_BYTES )
S_AXI_CONFIG_C	AxiStreamConfigType := ( TSTRB_EN_C = > ite ( S_HAS_TSTRB = 1 , true , false ) , TDATA_BYTES_C = > ite ( BYTE_PACKER_MODE = 1 , MAX_NUM_BYTES_C , S_TDATA_NUM_BYTES ) , TDEST_BITS_C = > S_TDEST_WIDTH , TID_BITS_C = > S_TID_WIDTH , TKEEP_MODE_C = > ite ( S_HAS_TKEEP = 1 , TKEEP_NORMAL_C , TKEEP_FIXED_C ) , TUSER_BITS_C = > S_TUSER_WIDTH , TUSER_MODE_C = > TUSER_NORMAL_C )
M_AXI_CONFIG_C	AxiStreamConfigType := ( TSTRB_EN_C = > ite ( M_HAS_TSTRB = 1 , true , false ) , TDATA_BYTES_C = > M_TDATA_NUM_BYTES , TDEST_BITS_C = > M_TDEST_WIDTH , TID_BITS_C = > M_TID_WIDTH , TKEEP_MODE_C = > ite ( M_HAS_TKEEP = 1 , TKEEP_NORMAL_C , TKEEP_FIXED_C ) , TUSER_BITS_C = > M_TUSER_WIDTH , TUSER_MODE_C = > TUSER_NORMAL_C )

Signals
sAxisMaster	AxiStreamMasterType := axiStreamMasterInit ( S_AXI_CONFIG_C )
sAxisSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C
mAxisMaster	AxiStreamMasterType := axiStreamMasterInit ( M_AXI_CONFIG_C )
mAxisSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C
axisClk	sl := ' 0 '
axisRst	sl := ' 0 '

Instantiations
u_shimlayerslave	SlaveAxiStreamIpIntegrator <Entity SlaveAxiStreamIpIntegrator>
u_axistreamgearbox	AxiStreamGearbox <Entity AxiStreamGearbox>
u_shimlayermaster	MasterAxiStreamIpIntegrator <Entity MasterAxiStreamIpIntegrator>

The documentation for this design unit was generated from the following file:

Constants

Signals