AxiStreamDeMux.structure Architecture Reference

Architecture >> AxiStreamDeMux::structure

Processes
comb	( axisRst , dynamicRouteDests , dynamicRouteMasks , pipeAxisSlaves , r , sAxisMaster )
seq	( axisClk , axisRst )
comb	( axisRst , dynamicRouteDests , dynamicRouteMasks , pipeAxisSlaves , r , sAxisMaster )
seq	( axisClk , axisRst )

Constants
REG_INIT_C	RegType := ( slave = > AXI_STREAM_SLAVE_INIT_C , masters = > ( others = > AXI_STREAM_MASTER_INIT_C ) )

Signals
pipeAxisMasters	AxiStreamMasterArray ( NUM_MASTERS_G- 1 downto 0 )
pipeAxisSlaves	AxiStreamSlaveArray ( NUM_MASTERS_G- 1 downto 0 )
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

Instantiations
u_pipeline	AxiStreamPipeline <Entity AxiStreamPipeline>
u_pipeline	AxiStreamPipeline <Entity AxiStreamPipeline>

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The documentation for this design unit was generated from the following files:

• axi/axi-stream/rtl/AxiStreamDeMux.vhd
• build/SRC_VHDL/surf/AxiStreamDeMux.vhd