Architecture >> AxiStreamBatcher::rtl

Processes
comb	( axisRst , forceTerm , maxClkGap , maxSubFrames , r , rxMaster , superFrameByteThreshold , txSlave )
seq	( axisClk )
comb	( axisRst , forceTerm , maxClkGap , maxSubFrames , r , rxMaster , superFrameByteThreshold , txSlave )
seq	( axisClk )

Constants
AXIS_WORD_SIZE_C	positive := AXIS_CONFIG_G.TDATA_BYTES_C
WIDTH_C	slv ( 3 downto 0 ) := toSlv ( log2 ( AXIS_WORD_SIZE_C/ 2 ) , 4 )
REG_INIT_C	RegType := ( superFrameByteThreshold = > toSlv ( SUPER_FRAME_BYTE_THRESHOLD_G , 32 ) , superByteCnt = > toSlv ( AXIS_WORD_SIZE_C , 32 ) , subByteCnt = > ( others = > ' 0 ' ) , maxSubFrames = > toSlv ( MAX_NUMBER_SUB_FRAMES_G , 16 ) , subFrameCnt = > ( others = > ' 0 ' ) , maxClkGap = > toSlv ( MAX_CLK_GAP_G , 32 ) , clkGapCnt = > ( others = > ' 0 ' ) , superFrameByteThresholdDet = > ' 0 ' , maxSubFramesDet = > ' 0 ' , forceTerm = > ' 0 ' , seqCnt = > ( others = > ' 0 ' ) , tDest = > ( others = > ' 0 ' ) , tUserFirst = > ( others = > ' 0 ' ) , tUserLast = > ( others = > ' 0 ' ) , chunkCnt = > 1 , rxSlave = > AXI_STREAM_SLAVE_INIT_C , txMaster = > AXI_STREAM_MASTER_INIT_C , state = > HEADER_S )

Types
StateType	( HEADER_S , SUB_FRAME_S , TAIL_S , CHUNK_TAIL_2BYTE_S , CHUNK_TAIL_4BYTE_S , GAP_S )

Records
RegType

Instantiations
u_input	AxiStreamPipeline <Entity AxiStreamPipeline>
u_output	AxiStreamPipeline <Entity AxiStreamPipeline>
u_input	AxiStreamPipeline <Entity AxiStreamPipeline>
u_output	AxiStreamPipeline <Entity AxiStreamPipeline>

The documentation for this design unit was generated from the following files:

Processes

Procedures