SURF
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AxiMonAxiLIpIntegrator Entity Reference
+ Inheritance diagram for AxiMonAxiLIpIntegrator:
+ Collaboration diagram for AxiMonAxiLIpIntegrator:

Entities

AxiMonAxiLIpIntegrator.rtl  architecture
 

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiPkg  Package <AxiPkg>
AxiLitePkg  Package <AxiLitePkg>

Ports

axiClk   in   sl
axiRst   in   sl
wrValid   in   sl
wrLast   in   sl
wrReady   in   sl
wrStrb   in   slv ( 3 downto 0 )
rdValid   in   sl
rdLast   in   sl
rdReady   in   sl
axilClk   in   sl
axilRst   in   sl
S_AXI_AWADDR   in   slv ( 6 downto 0 )
S_AXI_AWPROT   in   slv ( 2 downto 0 )
S_AXI_AWVALID   in   sl
S_AXI_AWREADY   out   sl
S_AXI_WDATA   in   slv ( 31 downto 0 )
S_AXI_WSTRB   in   slv ( 3 downto 0 )
S_AXI_WVALID   in   sl
S_AXI_WREADY   out   sl
S_AXI_BRESP   out   slv ( 1 downto 0 )
S_AXI_BVALID   out   sl
S_AXI_BREADY   in   sl
S_AXI_ARADDR   in   slv ( 6 downto 0 )
S_AXI_ARPROT   in   slv ( 2 downto 0 )
S_AXI_ARVALID   in   sl
S_AXI_ARREADY   out   sl
S_AXI_RDATA   out   slv ( 31 downto 0 )
S_AXI_RRESP   out   slv ( 1 downto 0 )
S_AXI_RVALID   out   sl
S_AXI_RREADY   in   sl

The documentation for this design unit was generated from the following file: