AxiLiteToIpBus Entity Reference

Inheritance diagram for AxiLiteToIpBus:

Collaboration diagram for AxiLiteToIpBus:

Entities
AxiLiteToIpBus.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiLitePkg	Package <AxiLitePkg>

Generics
TPD_G	time := 1 ns

Ports
clk	in	sl
rst	in	sl
axilReadMaster	in	AxiLiteReadMasterType
axilReadSlave	out	AxiLiteReadSlaveType
axilWriteMaster	in	AxiLiteWriteMasterType
axilWriteSlave	out	AxiLiteWriteSlaveType
ipbRdata	in	slv ( 31 downto 0 )
ipbAck	in	sl
ipbErr	in	sl
ipbAddr	out	slv ( 31 downto 0 )
ipbWdata	out	slv ( 31 downto 0 )
ipbStrobe	out	sl
ipbWrite	out	sl

---

The documentation for this design unit was generated from the following files:

• axi/bridge/rtl/AxiLiteToIpBus.vhd
• build/SRC_VHDL/surf/AxiLiteToIpBus.vhd