Architecture >> Ad9681::behavioral

Constants
PN_SHORT_TAPS_C	NaturalArray := ( 0 = > 4 , 1 = > 8 )
PN_SHORT_INIT_C	slv ( 8 downto 0 ) := " 011011111 "
PN_LONG_TAPS_C	NaturalArray := ( 0 = > 16 , 1 = > 22 )
PN_LONG_INIT_C	slv ( 22 downto 0 ) := " 01001101110000000101000 "
GLOBAL_CONFIG_INIT_C	GlobalConfigType := ( mode = > " 000 " , stabilizer = > ' 1 ' , clockDivRatio = > " 000 " , outputLvds = > ' 0 ' , outputInvert = > ' 0 ' , termination = > " 00 " , driveStrength = > ' 0 ' , lsbFirst = > ' 0 ' , outputMode = > " 011 " , pllLowRateMode = > ' 0 ' , sel2xFrame = > ' 0 ' , bits = > " 00 " , binFormat = > ' 1 ' , digitalFsAdj = > " 100 " )
CHANNEL_CONFIG_INIT_C	ChannelConfigType := ( chopMode = > ' 0 ' , pn23 = > PN_LONG_INIT_C , resetPnLongGen = > ' 0 ' , pn9 = > PN_SHORT_INIT_C , resetPnShortGen = > ' 0 ' , userTestMode = > " 00 " , outputTestMode = > " 0000 " , outputPhase = > " 0011 " , inputPhase = > " 000 " , userPattern1 = > X " 0000 " , userPattern2 = > X " 0000 " , offsetAdjust = > X " 00 " , outputReset = > ' 0 ' , powerDown = > ' 0 ' )
CONFIG_REG_INIT_C	ConfigRegType := ( vinDelay = > ( others = > ( others = > 0 . 0 ) ) , sample = > ( others = > " 0000000000000000 " ) , rdData = > X " 00000000 " , lsbFirst = > ' 0 ' , softReset = > ' 0 ' , channelConfigEn = > " 1111111111 " , tmpGlobal = > GLOBAL_CONFIG_INIT_C , tmpChannel = > CHANNEL_CONFIG_INIT_C , global = > GLOBAL_CONFIG_INIT_C , channel = > ( others = > CHANNEL_CONFIG_INIT_C ) , word = > ' 0 ' )

Types
ChannelConfigArray	array ( natural range <> ) of ChannelConfigType
DelayArray	( 15 downto 0 ) RealArray ( 7 downto 0 )

Signals
wrEn	sl
addr	slv ( 12 downto 0 )
wrData	slv ( 31 downto 0 )
byteValid	slv ( 3 downto 0 )
r	ConfigRegType := CONFIG_REG_INIT_C
rin	ConfigRegType
pllRst	sl
clk	sl
locked	sl
rst	sl
clkFbOut	sl
clkFbIn	sl
dClkInt	sl
dClk	sl
fClkInt	sl
fClk	sl
dcoInt	sl
dco	sl
fcoInt	sl
fco	sl
serData	slv8array ( 1 downto 0 )

Instantiations
clk_bufg	ibufgds
plle2_adv_inst	plle2_adv
fb_bufg	bufg
fclk_bufg	bufg
dclk_bufg	bufg
dco_bufg	bufg
fco_bufg	bufg
rstsync_1	RstSync <Entity RstSync>
adiconfigslave_1	AdiConfigSlave <Entity AdiConfigSlave>
ad9681serializer_1	Ad9681Serializer <Entity Ad9681Serializer>
data_out_buff	obufds
fclk_out_buff	ClkOutBufDiff <Entity ClkOutBufDiff>
dclk_out_buff	ClkOutBufDiff <Entity ClkOutBufDiff>

The documentation for this design unit was generated from the following file:

Processes

Constants