Ad9249ConfigNoPullup Entity Reference

Entities
Ad9249ConfigNoPullup.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiLitePkg	Package <AxiLitePkg>

Generics
TPD_G	time := 1 ns
DEN_POLARITY_G	sl := ' 1 '
CLK_PERIOD_G	real := 8 . 0E - 9
CLK_EN_PERIOD_G	real := 16 . 0E - 9
NUM_CHIPS_G	positive := 1

Ports
axilClk	in	sl
axilRst	in	sl
axilReadMaster	in	AxiLiteReadMasterType
axilReadSlave	out	AxiLiteReadSlaveType
axilWriteMaster	in	AxiLiteWriteMasterType
axilWriteSlave	out	AxiLiteWriteSlaveType
adcSClk	out	std_logic
adcSDin	in	std_logic
adcSDout	out	std_logic
adcSDEn	out	std_logic
adcCsb	out	std_logic_vector ( NUM_CHIPS_G* 2 - 1 downto 0 )
adcPdwn	out	std_logic_vector ( NUM_CHIPS_G- 1 downto 0 )

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The documentation for this design unit was generated from the following file:

• devices/AnalogDevices/ad9249/7Series/rtl/Ad9249ConfigNoPullup.vhd