SURF  1.0
mapping Architecture Reference

Functions

string   GetFifoType ( d_width: in in integer , a_width: in in integer )

Processes

PROCESS_30  ( clk )
PROCESS_31  ( clk )
PROCESS_32  ( clk )
PROCESS_33  ( clk )

Constants

FIFO_LENGTH_C  integer := ( ( 2 ** ADDR_WIDTH_G ) - 1 )
ALMOST_FULL_OFFSET_C  bit_vector := to_bitvector ( toSlv ( ( FIFO_LENGTH_C - FULL_THRES_G ) , 16 ) )
ALMOST_EMPTY_OFFSET_C  bit_vector := to_bitvector ( toSlv ( EMPTY_THRES_G , 16 ) )
FIFO_SIZE_C  string := GetFifoType ( DATA_WIDTH_G , ADDR_WIDTH_G )
READ_STATUS_INIT_C  ReadStatusType := ( prog_empty = > ' 1 ' , almost_empty = > ' 1 ' , empty = > ' 1 ' )

Signals

fifoStatus  ReadStatusType := READ_STATUS_INIT_C
fwftStatus  ReadStatusType := READ_STATUS_INIT_C
wrAddrPntr  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
rdAddrPntr  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
cnt  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
buildInFull  sl := ' 0 '
buildInEmpty  sl := ' 0 '
progEmpty  sl := ' 0 '
progFull  sl := ' 0 '
readEnable  sl := ' 0 '
rstFlags  sl := ' 0 '
fifoRst  sl := ' 0 '
wrEn  sl := ' 0 '
dummyWRERR  sl := ' 0 '
sValid  sl := ' 0 '
sRdEn  sl := ' 0 '
rstDet  sl := ' 0 '
dataOut  slv ( DATA_WIDTH_G - 1 downto 0 )

Attributes

use_dsp48  string
use_dsp48  cnt : signal is USE_DSP48_G

Records

ReadStatusType  
prog_empty  sl
almost_empty  sl
empty  sl

Instantiations

rstsync_full  RstSync <Entity RstSync>
synchronizeredge_full  SynchronizerEdge <Entity SynchronizerEdge>
rstsync_fifo  RstSync <Entity RstSync>
fifo_sync_macro_inst  fifo_sync_macro
fifooutputpipeline_inst  FifoOutputPipeline <Entity FifoOutputPipeline>

Detailed Description

Definition at line 66 of file FifoSyncBuiltIn.vhd.

Member Function Documentation

◆ GetFifoType()

string GetFifoType (   d_width in in integer ,
  a_width in in integer  
)
Function

Definition at line 68 of file FifoSyncBuiltIn.vhd.

◆ PROCESS_30()

PROCESS_30 (   clk)

Definition at line 234 of file FifoSyncBuiltIn.vhd.

◆ PROCESS_31()

PROCESS_31 (   clk  
)
Process

Definition at line 244 of file FifoSyncBuiltIn.vhd.

◆ PROCESS_32()

PROCESS_32 (   clk  
)
Process

Definition at line 276 of file FifoSyncBuiltIn.vhd.

◆ PROCESS_33()

PROCESS_33 (   clk)

Definition at line 317 of file FifoSyncBuiltIn.vhd.

Member Data Documentation

◆ FIFO_LENGTH_C

FIFO_LENGTH_C integer := ( ( 2 ** ADDR_WIDTH_G ) - 1 )
Constant

Definition at line 93 of file FifoSyncBuiltIn.vhd.

◆ ALMOST_FULL_OFFSET_C

ALMOST_FULL_OFFSET_C bit_vector := to_bitvector ( toSlv ( ( FIFO_LENGTH_C - FULL_THRES_G ) , 16 ) )
Constant

Definition at line 94 of file FifoSyncBuiltIn.vhd.

◆ ALMOST_EMPTY_OFFSET_C

ALMOST_EMPTY_OFFSET_C bit_vector := to_bitvector ( toSlv ( EMPTY_THRES_G , 16 ) )
Constant

Definition at line 95 of file FifoSyncBuiltIn.vhd.

◆ FIFO_SIZE_C

FIFO_SIZE_C string := GetFifoType ( DATA_WIDTH_G , ADDR_WIDTH_G )
Constant

Definition at line 96 of file FifoSyncBuiltIn.vhd.

◆ ReadStatusType

Definition at line 98 of file FifoSyncBuiltIn.vhd.

◆ prog_empty

prog_empty sl
Record

Definition at line 100 of file FifoSyncBuiltIn.vhd.

◆ almost_empty

almost_empty sl
Record

Definition at line 101 of file FifoSyncBuiltIn.vhd.

◆ empty

empty sl
Record

Definition at line 102 of file FifoSyncBuiltIn.vhd.

◆ READ_STATUS_INIT_C

READ_STATUS_INIT_C ReadStatusType := ( prog_empty = > ' 1 ' , almost_empty = > ' 1 ' , empty = > ' 1 ' )
Constant

Definition at line 104 of file FifoSyncBuiltIn.vhd.

◆ fifoStatus

Definition at line 108 of file FifoSyncBuiltIn.vhd.

◆ fwftStatus

Definition at line 108 of file FifoSyncBuiltIn.vhd.

◆ wrAddrPntr

wrAddrPntr slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 112 of file FifoSyncBuiltIn.vhd.

◆ rdAddrPntr

rdAddrPntr slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 112 of file FifoSyncBuiltIn.vhd.

◆ cnt

cnt slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 112 of file FifoSyncBuiltIn.vhd.

◆ buildInFull

buildInFull sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ buildInEmpty

buildInEmpty sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ progEmpty

progEmpty sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ progFull

progFull sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ readEnable

readEnable sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ rstFlags

rstFlags sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ fifoRst

fifoRst sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ wrEn

wrEn sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ dummyWRERR

dummyWRERR sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ sValid

sValid sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ sRdEn

sRdEn sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ rstDet

rstDet sl := ' 0 '
Signal

Definition at line 124 of file FifoSyncBuiltIn.vhd.

◆ dataOut

dataOut slv ( DATA_WIDTH_G - 1 downto 0 )
Signal

Definition at line 126 of file FifoSyncBuiltIn.vhd.

◆ use_dsp48 [1/2]

use_dsp48 string
Attribute

Definition at line 129 of file FifoSyncBuiltIn.vhd.

◆ use_dsp48 [2/2]

use_dsp48 cnt : signal is USE_DSP48_G
Attribute

Definition at line 130 of file FifoSyncBuiltIn.vhd.

◆ rstsync_full

rstsync_full RstSync
Instantiation

Definition at line 180 of file FifoSyncBuiltIn.vhd.

◆ synchronizeredge_full

synchronizeredge_full SynchronizerEdge
Instantiation

Definition at line 188 of file FifoSyncBuiltIn.vhd.

◆ rstsync_fifo

rstsync_fifo RstSync
Instantiation

Definition at line 197 of file FifoSyncBuiltIn.vhd.

◆ fifo_sync_macro_inst

fifo_sync_macro_inst fifo_sync_macro
Instantiation

Definition at line 221 of file FifoSyncBuiltIn.vhd.

◆ fifooutputpipeline_inst

fifooutputpipeline_inst FifoOutputPipeline
Instantiation

Definition at line 317 of file FifoSyncBuiltIn.vhd.


The documentation for this class was generated from the following file: