SURF  1.0
Generics | Ports | Libraries | Use Clauses
FifoOutputPipeline Entity Reference
base » fifo
+ Inheritance diagram for FifoOutputPipeline:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>

Generics

TPD_G  time := 1 ns
RST_POLARITY_G  sl := ' 1 '
RST_ASYNC_G  boolean := false
DATA_WIDTH_G  integer range 1 to ( 2 ** 24 ) := 16
PIPE_STAGES_G  natural range 0 to 16 := 1

Ports

sData   in slv ( DATA_WIDTH_G - 1 downto 0 )
sValid   in sl
sRdEn   out sl
mData   out slv ( DATA_WIDTH_G - 1 downto 0 )
mValid   out sl
mRdEn   in sl
clk   in sl
rst   in sl := not RST_POLARITY_G

Detailed Description

See also
entity

Definition at line 26 of file FifoOutputPipeline.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 28 of file FifoOutputPipeline.vhd.

◆ RST_POLARITY_G

RST_POLARITY_G sl := ' 1 '
Generic

Definition at line 29 of file FifoOutputPipeline.vhd.

◆ RST_ASYNC_G

RST_ASYNC_G boolean := false
Generic

Definition at line 30 of file FifoOutputPipeline.vhd.

◆ DATA_WIDTH_G

DATA_WIDTH_G integer range 1 to ( 2 ** 24 ) := 16
Generic

Definition at line 31 of file FifoOutputPipeline.vhd.

◆ PIPE_STAGES_G

PIPE_STAGES_G natural range 0 to 16 := 1
Generic

Definition at line 32 of file FifoOutputPipeline.vhd.

◆ sData

sData in slv ( DATA_WIDTH_G - 1 downto 0 )
Port

Definition at line 35 of file FifoOutputPipeline.vhd.

◆ sValid

sValid in sl
Port

Definition at line 36 of file FifoOutputPipeline.vhd.

◆ sRdEn

sRdEn out sl
Port

Definition at line 37 of file FifoOutputPipeline.vhd.

◆ mData

mData out slv ( DATA_WIDTH_G - 1 downto 0 )
Port

Definition at line 39 of file FifoOutputPipeline.vhd.

◆ mValid

mValid out sl
Port

Definition at line 40 of file FifoOutputPipeline.vhd.

◆ mRdEn

mRdEn in sl
Port

Definition at line 41 of file FifoOutputPipeline.vhd.

◆ clk

clk in sl
Port

Definition at line 43 of file FifoOutputPipeline.vhd.

◆ rst

rst in sl := not RST_POLARITY_G
Port

Definition at line 44 of file FifoOutputPipeline.vhd.

◆ ieee

ieee
Library

Definition at line 19 of file FifoOutputPipeline.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 20 of file FifoOutputPipeline.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 22 of file FifoOutputPipeline.vhd.

The documentation for this class was generated from the following file: