SURF  1.0
structure Architecture Reference

Processes

TDEST_REMAP  ( sAxisMasters )
comb  ( axisRst , disableSel , pipeAxisSlave , r , sAxisMastersTmp )
seq  ( axisClk )

Constants

DEST_SIZE_C  integer := bitSize ( NUM_SLAVES_G - 1 )
ARB_BITS_C  integer := 2 ** DEST_SIZE_C
ACNT_SIZE_G  integer := bitSize ( ILEAVE_REARB_G )
REG_INIT_C  RegType := ( state = > IDLE_S , acks = > ( others = > ' 0 ' ) , ackNum = > toSlv ( NUM_SLAVES_G - 1 , DEST_SIZE_C ) , valid = > ' 0 ' , arbCnt = > ( others = > ' 0 ' ) , slaves = > ( others = > AXI_STREAM_SLAVE_INIT_C ) , master = > AXI_STREAM_MASTER_INIT_C )

Types

StateType ( IDLE_S , MOVE_S )

Signals

r  RegType := REG_INIT_C
rin  RegType
sAxisMastersTmp  AxiStreamMasterArray ( NUM_SLAVES_G - 1 downto 0 )
pipeAxisMaster  AxiStreamMasterType
pipeAxisSlave  AxiStreamSlaveType

Records

RegType  
state  StateType
acks  slv ( ARB_BITS_C - 1 downto 0 )
ackNum  slv ( DEST_SIZE_C - 1 downto 0 )
valid  sl
arbCnt  slv ( ACNT_SIZE_G - 1 downto 0 )
slaves  AxiStreamSlaveArray ( NUM_SLAVES_G - 1 downto 0 )
master  AxiStreamMasterType

Instantiations

axistreampipeline_1  AxiStreamPipeline <Entity AxiStreamPipeline>

Detailed Description

Definition at line 54 of file AxiStreamMux.vhd.

Member Function Documentation

◆ TDEST_REMAP()

TDEST_REMAP (   sAxisMasters  
)
Process

Definition at line 103 of file AxiStreamMux.vhd.

◆ comb()

comb (   axisRst ,
  disableSel ,
  pipeAxisSlave ,
  r ,
  sAxisMastersTmp  
)
Process

Definition at line 125 of file AxiStreamMux.vhd.

◆ seq()

seq (   axisClk)

Definition at line 239 of file AxiStreamMux.vhd.

Member Data Documentation

◆ DEST_SIZE_C

DEST_SIZE_C integer := bitSize ( NUM_SLAVES_G - 1 )
Constant

Definition at line 56 of file AxiStreamMux.vhd.

◆ ARB_BITS_C

ARB_BITS_C integer := 2 ** DEST_SIZE_C
Constant

Definition at line 57 of file AxiStreamMux.vhd.

◆ ACNT_SIZE_G

ACNT_SIZE_G integer := bitSize ( ILEAVE_REARB_G )
Constant

Definition at line 58 of file AxiStreamMux.vhd.

◆ StateType

StateType ( IDLE_S , MOVE_S )
Type

Definition at line 60 of file AxiStreamMux.vhd.

◆ RegType

RegType
Record

Definition at line 64 of file AxiStreamMux.vhd.

◆ state

state StateType
Record

Definition at line 65 of file AxiStreamMux.vhd.

◆ acks

acks slv ( ARB_BITS_C - 1 downto 0 )
Record

Definition at line 66 of file AxiStreamMux.vhd.

◆ ackNum

ackNum slv ( DEST_SIZE_C - 1 downto 0 )
Record

Definition at line 67 of file AxiStreamMux.vhd.

◆ valid

valid sl
Record

Definition at line 68 of file AxiStreamMux.vhd.

◆ arbCnt

arbCnt slv ( ACNT_SIZE_G - 1 downto 0 )
Record

Definition at line 69 of file AxiStreamMux.vhd.

◆ slaves

slaves AxiStreamSlaveArray ( NUM_SLAVES_G - 1 downto 0 )
Record

Definition at line 70 of file AxiStreamMux.vhd.

◆ master

Definition at line 71 of file AxiStreamMux.vhd.

◆ REG_INIT_C

REG_INIT_C RegType := ( state = > IDLE_S , acks = > ( others = > ' 0 ' ) , ackNum = > toSlv ( NUM_SLAVES_G - 1 , DEST_SIZE_C ) , valid = > ' 0 ' , arbCnt = > ( others = > ' 0 ' ) , slaves = > ( others = > AXI_STREAM_SLAVE_INIT_C ) , master = > AXI_STREAM_MASTER_INIT_C )
Constant

Definition at line 74 of file AxiStreamMux.vhd.

◆ r

r RegType := REG_INIT_C
Signal

Definition at line 83 of file AxiStreamMux.vhd.

◆ rin

rin RegType
Signal

Definition at line 84 of file AxiStreamMux.vhd.

◆ sAxisMastersTmp

Definition at line 86 of file AxiStreamMux.vhd.

◆ pipeAxisMaster

Definition at line 87 of file AxiStreamMux.vhd.

◆ pipeAxisSlave

Definition at line 88 of file AxiStreamMux.vhd.

◆ axistreampipeline_1

axistreampipeline_1 AxiStreamPipeline
Instantiation

Definition at line 237 of file AxiStreamMux.vhd.


The documentation for this class was generated from the following file: