SURF  1.0
Generics | Ports | Libraries | Use Clauses
AxiStreamPipeline Entity Reference
axi
+ Inheritance diagram for AxiStreamPipeline:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>

Generics

TPD_G  time := 1 ns
PIPE_STAGES_G  natural range 0 to 16 := 0

Ports

axisClk   in sl
axisRst   in sl
sAxisMaster   in AxiStreamMasterType
sAxisSlave   out AxiStreamSlaveType
mAxisMaster   out AxiStreamMasterType
mAxisSlave   in AxiStreamSlaveType

Detailed Description

See also
entity

Definition at line 27 of file AxiStreamPipeline.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 29 of file AxiStreamPipeline.vhd.

◆ PIPE_STAGES_G

PIPE_STAGES_G natural range 0 to 16 := 0
Generic

Definition at line 30 of file AxiStreamPipeline.vhd.

◆ axisClk

axisClk in sl
Port

Definition at line 33 of file AxiStreamPipeline.vhd.

◆ axisRst

axisRst in sl
Port

Definition at line 34 of file AxiStreamPipeline.vhd.

◆ sAxisMaster

sAxisMaster in AxiStreamMasterType
Port

Definition at line 36 of file AxiStreamPipeline.vhd.

◆ sAxisSlave

sAxisSlave out AxiStreamSlaveType
Port

Definition at line 37 of file AxiStreamPipeline.vhd.

◆ mAxisMaster

mAxisMaster out AxiStreamMasterType
Port

Definition at line 39 of file AxiStreamPipeline.vhd.

◆ mAxisSlave

mAxisSlave in AxiStreamSlaveType
Port

Definition at line 40 of file AxiStreamPipeline.vhd.

◆ ieee

ieee
Library

Definition at line 19 of file AxiStreamPipeline.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 20 of file AxiStreamPipeline.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 22 of file AxiStreamPipeline.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 23 of file AxiStreamPipeline.vhd.

The documentation for this class was generated from the following file: