SURF  1.0
PwrUpRst.vhd
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1 -------------------------------------------------------------------------------
2 -- File : PwrUpRst.vhd
3 -- Company : SLAC National Accelerator Laboratory
4 -- Created : 2013-07-30
5 -- Last update: 2013-12-05
6 -------------------------------------------------------------------------------
7 -- Description: Synchronizes a reset signal and holds it for a parametrized
8 -- number of cycles.
9 -------------------------------------------------------------------------------
10 -- This file is part of 'SLAC Firmware Standard Library'.
11 -- It is subject to the license terms in the LICENSE.txt file found in the
12 -- top-level directory of this distribution and at:
13 -- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
14 -- No part of 'SLAC Firmware Standard Library', including this file,
15 -- may be copied, modified, propagated, or distributed except according to
16 -- the terms contained in the LICENSE.txt file.
17 -------------------------------------------------------------------------------
18 
19 library ieee;
20 use ieee.std_logic_1164.all;
21 use ieee.std_logic_unsigned.all;
22 use ieee.std_logic_arith.all;
23 
24 use work.StdRtlPkg.all;
25 
26 --! @see entity
27  --! @ingroup base_general
28 entity PwrUpRst is
29  generic (
30  TPD_G : time := 1 ns;
31  SIM_SPEEDUP_G : boolean := false;
32  IN_POLARITY_G : sl := '1';
33  OUT_POLARITY_G : sl := '1';
34  USE_DSP48_G : string := "no";
35  DURATION_G : natural range 0 to ((2**30)-1) := 156250000);
36  port (
37  arst : in sl := not IN_POLARITY_G;
38  clk : in sl;
39  rstOut : out sl);
40 end PwrUpRst;
41 
42 architecture rtl of PwrUpRst is
43 
44  constant CNT_SIZE_C : natural := ite(SIM_SPEEDUP_G, 127, DURATION_G);
45  signal rstSync,
46  rst : sl := OUT_POLARITY_G;
47  signal cnt : natural range 0 to DURATION_G := 0;
48 
49  -- Attribute for XST
50  attribute use_dsp48 : string;
51  attribute use_dsp48 of cnt : signal is USE_DSP48_G;
52 
53 begin
54 
55  -- USE_DSP48_G check
56  assert ((USE_DSP48_G = "yes") or (USE_DSP48_G = "no") or (USE_DSP48_G = "auto") or (USE_DSP48_G = "automax"))
57  report "USE_DSP48_G must be either yes, no, auto, or automax"
58  severity failure;
59 
60  RstSync_Inst : entity work.RstSync
61  generic map (
62  TPD_G => TPD_G,
65  port map (
66  clk => clk,
67  asyncRst => arst,
68  syncRst => rstSync);
69 
70  process (clk)
71  begin
72  if rising_edge(clk) then
73  if rstSync = OUT_POLARITY_G then
74  rst <= OUT_POLARITY_G after TPD_G;
75  cnt <= 0 after TPD_G;
76  else
77  if cnt /= CNT_SIZE_C then
78  rst <= OUT_POLARITY_G after TPD_G;
79  cnt <= cnt + 1 after TPD_G;
80  else
81  rst <= not(OUT_POLARITY_G) after TPD_G;
82  end if;
83  end if;
84  end if;
85  end process;
86 
87  rstOut <= rst;
88 
89 end rtl;
out rstOutsl
Definition: PwrUpRst.vhd:39
TPD_Gtime := 1 ns
Definition: PwrUpRst.vhd:30
out syncRstsl
Definition: RstSync.vhd:36
IN_POLARITY_Gsl := '1'
Definition: RstSync.vhd:28
std_logic sl
Definition: StdRtlPkg.vhd:28
IN_POLARITY_Gsl := '1'
Definition: PwrUpRst.vhd:32
in asyncRstsl
Definition: RstSync.vhd:35
in clksl
Definition: RstSync.vhd:34
OUT_POLARITY_Gsl := '1'
Definition: RstSync.vhd:29
in arstsl :=not IN_POLARITY_G
Definition: PwrUpRst.vhd:37
USE_DSP48_Gstring := "no"
Definition: PwrUpRst.vhd:34
TPD_Gtime := 1 ns
Definition: RstSync.vhd:27
OUT_POLARITY_Gsl := '1'
Definition: PwrUpRst.vhd:33
in clksl
Definition: PwrUpRst.vhd:38
DURATION_Gnatural range 0 to (( 2** 30)- 1):= 156250000
Definition: PwrUpRst.vhd:35
SIM_SPEEDUP_Gboolean := false
Definition: PwrUpRst.vhd:31
_library_ ieeeieee
Definition: PrbsPkg.vhd:18