SURF  1.0
AxiAd9467Pkg.vhd
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1 -------------------------------------------------------------------------------
2 -- File : AxiAd9467Pkg.vhd
3 -- Company : SLAC National Accelerator Laboratory
4 -- Created : 2014-09-23
5 -- Last update: 2014-09-24
6 --------------------------------------------------------------------------------------------------------------------------------------------------------------
7 -- Description: AD9467 Package File
8 -------------------------------------------------------------------------------
9 -- This file is part of 'SLAC Firmware Standard Library'.
10 -- It is subject to the license terms in the LICENSE.txt file found in the
11 -- top-level directory of this distribution and at:
12 -- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
13 -- No part of 'SLAC Firmware Standard Library', including this file,
14 -- may be copied, modified, propagated, or distributed except according to
15 -- the terms contained in the LICENSE.txt file.
16 -------------------------------------------------------------------------------
17 
18 library ieee;
19 use ieee.std_logic_1164.all;
20 
21 use work.StdRtlPkg.all;
22 
23 package AxiAd9467Pkg is
24 --! @file
25  --! @ingroup devices_AnalogDevices_ad9467
26 
27  type AxiAd9467InType is record
28  clkP : sl;
29  clkN : sl;
30  orP : sl;
31  orN : sl;
32  dataP : slv(7 downto 0);
33  dataN : slv(7 downto 0);
34  end record;
35  type AxiAd9467InArray is array (natural range <>) of AxiAd9467InType;
36  type AxiAd9467InVectorArray is array (integer range<>, integer range<>)of AxiAd9467InType;
38  clkP => '0',
39  clkN => '1',
40  orP => '0',
41  orN => '1',
42  dataP => (others => '0'),
43  dataN => (others => '1'));
44 
45  type AxiAd9467InOutType is record
46  sdio : sl;
47  end record;
48  type AxiAd9467InOutArray is array (natural range <>) of AxiAd9467InOutType;
49  type AxiAd9467InOutVectorArray is array (integer range<>, integer range<>)of AxiAd9467InOutType;
51  sdio => 'Z');
52 
53  type AxiAd9467OutType is record
54  cs : sl;
55  sck : sl;
56  clkP : sl;
57  clkN : sl;
58  end record;
59  type AxiAd9467OutArray is array (natural range <>) of AxiAd9467OutType;
60  type AxiAd9467OutVectorArray is array (integer range<>, integer range<>)of AxiAd9467OutType;
62  cs => '1',
63  sck => '1',
64  clkP => '0',
65  clkN => '1');
66 
67  type AxiAd9467SpiInType is record
68  req : sl;
69  RnW : sl;
70  din : slv(7 downto 0);
71  addr : slv(11 downto 0);
72  end record;
74  '0',
75  '0',
76  (others => '0'),
77  (others => '0'));
78 
79  type AxiAd9467SpiOutType is record
80  ack : sl;
81  dout : slv(7 downto 0);
82  end record;
84  '0',
85  (others => '0'));
86 
87  type AxiAd9467DelayInType is record
88  dmux : sl;
89  load : sl;
90  rst : sl;
91  data : Slv5Array(0 to 7);
92  end record;
94  dmux => '0',
95  load => '0',
96  rst => '0',
97  data => (others => "00000"));
98 
99  type AxiAd9467DelayOutType is record
100  rdy : sl;
101  data : Slv5Array(0 to 7);
102  end record;
104  rdy => '0',
105  data => (others => "00000"));
106 
107  type AxiAd9467StatusType is record
109  adcData : slv(15 downto 0);
110  adcDataMon : Slv16Array(0 to 15);
113  end record;
115  pllLocked => '0',
116  adcData => x"0000",
117  adcDataMon => (others => x"0000"),
120 
121  type AxiAd9467ConfigType is record
124  end record;
128 
129 end package;
slv( 7 downto 0) din
AxiAd9467ConfigType :=(spi => AXI_AD9467_SPI_IN_INIT_C,delay => AXI_AD9467_DELAY_IN_INIT_C) AXI_AD9467_CONFIG_INIT_C
AxiAd9467DelayInType :=(dmux => '0',load => '0',rst => '0',data =>( others => "00000")) AXI_AD9467_DELAY_IN_INIT_C
AxiAd9467DelayOutType delay
AxiAd9467SpiOutType :=( '0',( others => '0')) AXI_AD9467_SPI_OUT_INIT_C
std_logic sl
Definition: StdRtlPkg.vhd:28
Slv16Array( 0 to 15) adcDataMon
array(natural range <> ) of AxiAd9467InOutType AxiAd9467InOutArray
array(natural range <> ) of AxiAd9467OutType AxiAd9467OutArray
AxiAd9467SpiOutType spi
AxiAd9467DelayOutType :=(rdy => '0',data =>( others => "00000")) AXI_AD9467_DELAY_OUT_INIT_C
array(integer range <> ,integer range <> ) of AxiAd9467OutType AxiAd9467OutVectorArray
array(integer range <> ,integer range <> ) of AxiAd9467InType AxiAd9467InVectorArray
slv( 7 downto 0) dataP
Slv5Array( 0 to 7) data
AxiAd9467InOutType :=(sdio => 'Z') AXI_AD9467_IN_OUT_INIT_C
AxiAd9467SpiInType :=( '0', '0',( others => '0'),( others => '0')) AXI_AD9467_SPI_IN_INIT_C
array(natural range <> ) of slv( 15 downto 0) Slv16Array
Definition: StdRtlPkg.vhd:395
array(natural range <> ) of AxiAd9467InType AxiAd9467InArray
slv( 7 downto 0) dout
AxiAd9467InType :=(clkP => '0',clkN => '1',orP => '0',orN => '1',dataP =>( others => '0'),dataN =>( others => '1')) AXI_AD9467_IN_INIT_C
AxiAd9467StatusType :=(pllLocked => '0',adcData => x"0000",adcDataMon =>( others => x"0000"),spi => AXI_AD9467_SPI_OUT_INIT_C,delay => AXI_AD9467_DELAY_OUT_INIT_C) AXI_AD9467_STATUS_INIT_C
array(natural range <> ) of slv( 4 downto 0) Slv5Array
Definition: StdRtlPkg.vhd:406
slv( 7 downto 0) dataN
_library_ ieeeieee
slv( 15 downto 0) adcData
array(integer range <> ,integer range <> ) of AxiAd9467InOutType AxiAd9467InOutVectorArray
AxiAd9467OutType :=(cs => '1',sck => '1',clkP => '0',clkN => '1') AXI_AD9467_OUT_INIT_C
slv( 11 downto 0) addr
std_logic_vector slv
Definition: StdRtlPkg.vhd:29