axi-pcie-core Documentation

AXI-Lite/AXI-Stream interconnect and DMA infrastructure library for PCIe carrier boards, used as a git submodule by downstream SLAC firmware projects.

Contents:

• Tutorials
  • First Build
• How-To Guides
  • Integrate axi-pcie-core as a Git Submodule
  • Add a New Board
  • Use the PyRogue Device Tree
  • Release Flow
• Reference
  • RTL Entity Reference
  • Register Map Reference
  • PyRogue API Reference
  • Supported Boards
• Explanation
  • Overview
  • Architecture
  • PCIe DMA Model
  • Board Support