Explanation

This section provides narrative material explaining how axi-pcie-core is structured and why it is designed the way it is — distinct from the step-by-step how-to guides and the API reference.

Explanation

• Overview
  • What axi-pcie-core Is
  • Audience
  • Scope
  • Relationship to ruckus and surf
• Architecture
  • Overview
  • AXI-Lite Register Tree
  • AXI-Stream DMA Channels
  • Board Abstraction: AxiPciePkg and AxiPcieSharedPkg
• PCIe DMA Model
  • Inbound and Outbound FIFOs
  • Descriptor Rings
  • Back-Pressure via tReady
  • DMA IRQ Flow
  • End-to-End Data-Flow Diagram
• Board Support
  • Directory Convention
  • Shared vs. Board-Specific Layering
  • The ruckus.tcl Entry-Point Chain
  • Adding a New Board (overview)