Architecture >> UdpDebugBridge::stub
|
syn_black_box | boolean |
black_box_pad_pin | string |
syn_black_box | architecture is true |
black_box_pad_pin | architecture is " axisClk , axisRst , \mAxisReq [ tValid ] \ , \mAxisReq [ tData ] \ [ 1023 : 0 ] , \mAxisReq [ tStrb ] \ [ 127 : 0 ] , \mAxisReq [ tKeep ] \ [ 127 : 0 ] , \mAxisReq [ tLast ] \ , \mAxisReq [ tDest ] \ [ 7 : 0 ] , \mAxisReq [ tId ] \ [ 7 : 0 ] , \mAxisReq [ tUser ] \ [ 1023 : 0 ] , \sAxisReq [ tReady ] \ , \mAxisTdo [ tValid ] \ , \mAxisTdo [ tData ] \ [ 1023 : 0 ] , \mAxisTdo [ tStrb ] \ [ 127 : 0 ] , \mAxisTdo [ tKeep ] \ [ 127 : 0 ] , \mAxisTdo [ tLast ] \ , \mAxisTdo [ tDest ] \ [ 7 : 0 ] , \mAxisTdo [ tId ] \ [ 7 : 0 ] , \mAxisTdo [ tUser ] \ [ 1023 : 0 ] , \sAxisTdo [ tReady ] \ " |
The documentation for this design unit was generated from the following files:
- xilinx/xvc-udp/dcp/7Series/Impl/images/UdpDebugBridge_stub.vhd
- xilinx/xvc-udp/dcp/7Series/Stub/images/UdpDebugBridge_stub.vhd
- xilinx/xvc-udp/dcp/UltraScale/Impl/images/UdpDebugBridge_stub.vhd
- xilinx/xvc-udp/dcp/UltraScale/Stub/images/UdpDebugBridge_stub.vhd