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SugoiSubordinateCore Entity Reference
Inheritance diagram for SugoiSubordinateCore: Collaboration diagram for SugoiSubordinateCore:Entities | |
| SugoiSubordinateCore.mapping | architecture |
Libraries | |
| ieee | |
| surf | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_arith | |
| std_logic_unsigned | |
| StdRtlPkg | Package <StdRtlPkg> |
| AxiLitePkg | Package <AxiLitePkg> |
Generics | |
| TPD_G | time := 1 ns |
| RST_POLARITY_G | sl := ' 1 ' |
| RST_ASYNC_G | boolean := false |
Ports | ||
| pwrOnRst | in | sl |
| clk | in | sl |
| rst | out | sl |
| rstL | out | sl |
| rx | in | sl |
| tx | out | sl |
| linkup | out | sl |
| opCode | out | slv ( 7 downto 0 ) |
| axilReadMaster | out | AxiLiteReadMasterType |
| axilReadSlave | in | AxiLiteReadSlaveType |
| axilWriteMaster | out | AxiLiteWriteMasterType |
| axilWriteSlave | in | AxiLiteWriteSlaveType |
The documentation for this design unit was generated from the following files:
- build/SRC_VHDL/surf/SugoiSubordinateCore.vhd
- protocols/sugoi/rtl/SugoiSubordinateCore.vhd
