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SugoiAxiLitePixelMatrixConfig.rtl Architecture Reference
Architecture >> SugoiAxiLitePixelMatrixConfig::rtl

Processes

comb  ( axilReadMaster , axilRst , axilWriteMaster , dataIn , r )
seq  ( axilClk , axilRst )
comb  ( axilReadMaster , axilRst , axilWriteMaster , dataIn , r )
seq  ( axilClk , axilRst )

Constants

COL_DEC_ADDR_LOW_C  integer := 2
COL_DEC_ADDR_HIGH_C  integer := ( COL_WIDTH_G+ COL_DEC_ADDR_LOW_C ) - 1
ROW_DEC_ADDR_LOW_C  integer := COL_DEC_ADDR_HIGH_C+ 1
ROW_DEC_ADDR_HIGH_C  integer := ( ROW_WIDTH_G+ ROW_DEC_ADDR_LOW_C ) - 1
ADDR_PARTITION_C  integer := 2 + COL_WIDTH_G+ ROW_WIDTH_G
REG_INIT_C  RegType := ( colReg = > ( others = > ' 0 ' ) , colAddr = > ( others = > ' 0 ' ) , rowReg = > ( others = > ' 0 ' ) , rowAddr = > ( others = > ' 0 ' ) , allCol = > ' 0 ' , allRow = > ' 0 ' , dataOut = > ( others = > ' 0 ' ) , readWrite = > ' 0 ' , configTri = > ' 1 ' , globalRstL = > ' 1 ' , cckReg = > ' 0 ' , cckPix = > ' 0 ' , cnt = > 0 , timer = > ( others = > ' 0 ' ) , timerSize = > ( others = > ' 1 ' ) , axilReadSlave = > AXI_LITE_READ_SLAVE_INIT_C , axilWriteSlave = > AXI_LITE_WRITE_SLAVE_INIT_C , state = > IDLE_S )

Types

StateType  ( IDLE_S , READ_CMD_S , WRITE_CMD_S )

Subtypes

COL_ADDR_RANGE_C  integer range COL_DEC_ADDR_HIGH_C downto COL_DEC_ADDR_LOW_C
ROW_ADDR_RANGE_C  integer range ROW_DEC_ADDR_HIGH_C downto ROW_DEC_ADDR_LOW_C

Signals

r  RegType := REG_INIT_C
rin  RegType
dataIn  slv ( DATA_WIDTH_G- 1 downto 0 ) := ( others = > ' 0 ' )

Records

RegType 

The documentation for this design unit was generated from the following files: