SsiCmdMaster Entity Reference

Inheritance diagram for SsiCmdMaster:

Collaboration diagram for SsiCmdMaster:

Entities
SsiCmdMaster.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
SsiPkg	Package <SsiPkg>
SsiCmdMasterPkg	Package <SsiCmdMasterPkg>

Generics
TPD_G	time := 1 ns
RST_ASYNC_G	boolean := false
SLAVE_READY_EN_G	boolean := false
MEMORY_TYPE_G	string := " distributed "
GEN_SYNC_FIFO_G	boolean := false
CASCADE_SIZE_G	integer range 1 to ( 2 ** 24 ) := 1
FIFO_ADDR_WIDTH_G	integer range 4 to 48 := 5
FIFO_FIXED_THRESH_G	boolean := true
FIFO_PAUSE_THRESH_G	integer range 1 to ( 2 ** 24 ) := 8
AXI_STREAM_CONFIG_G	AxiStreamConfigType

Ports
axisClk	in	sl
axisRst	in	sl := ' 0 '
sAxisMaster	in	AxiStreamMasterType
sAxisSlave	out	AxiStreamSlaveType
sAxisCtrl	out	AxiStreamCtrlType
cmdClk	in	sl
cmdRst	in	sl
cmdMaster	out	SsiCmdMasterType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/SsiCmdMaster.vhd
• protocols/ssi/rtl/SsiCmdMaster.vhd