SURF
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SrpV3AxiWrapper Entity Reference
+ Inheritance diagram for SrpV3AxiWrapper:
+ Collaboration diagram for SrpV3AxiWrapper:

Entities

SrpV3AxiWrapper.rtl  architecture
 

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiPkg  Package <AxiPkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>

Ports

AXIS_ACLK   in   std_logic
AXIS_ARESETN   in   std_logic
S_AXIS_TVALID   in   std_logic
S_AXIS_TDATA   in   std_logic_vector ( 31 downto 0 )
S_AXIS_TKEEP   in   std_logic_vector ( 3 downto 0 )
S_AXIS_TLAST   in   std_logic
S_AXIS_TDEST   in   std_logic_vector ( 3 downto 0 )
S_AXIS_TID   in   std_logic_vector ( 0 downto 0 )
S_AXIS_TUSER   in   std_logic_vector ( 1 downto 0 )
S_AXIS_TREADY   out   std_logic
M_AXIS_TVALID   out   std_logic
M_AXIS_TDATA   out   std_logic_vector ( 31 downto 0 )
M_AXIS_TKEEP   out   std_logic_vector ( 3 downto 0 )
M_AXIS_TLAST   out   std_logic
M_AXIS_TDEST   out   std_logic_vector ( 3 downto 0 )
M_AXIS_TID   out   std_logic_vector ( 0 downto 0 )
M_AXIS_TUSER   out   std_logic_vector ( 1 downto 0 )
M_AXIS_TREADY   in   std_logic

The documentation for this design unit was generated from the following file: