SURF
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SpiSlave Entity Reference
+ Inheritance diagram for SpiSlave:
+ Collaboration diagram for SpiSlave:

Entities

SpiSlave.rtl  architecture
 

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>

Generics

TPD_G  time := 1 ns
CPOL_G  sl := ' 0 '
CPHA_G  sl := ' 1 '
WORD_SIZE_G  positive := 16

Ports

clk   in   sl
rst   in   sl
sclk   in   sl
mosi   in   sl
miso   out   sl
selL   in   sl
rdData   in   slv ( WORD_SIZE_G- 1 downto 0 )
rdStb   in   sl
wrData   out   slv ( WORD_SIZE_G- 1 downto 0 )
wrStb   out   sl

The documentation for this design unit was generated from the following file: