SizedFIFO Entity Reference

Inheritance diagram for SizedFIFO:

Entities
SizedFIFO.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
numeric_std
StdRtlPkg	Package <StdRtlPkg>

Generics
P1WIDTH_G	positive := 1
P2DEPTH_G	positive := 3
P3CNTR_WIDTH_G	positive := 1

Ports
CLK	in	sl
RST	in	sl
D_IN	in	slv ( P1WIDTH_G- 1 downto 0 )
ENQ	in	sl
FULL_N	out	sl
D_OUT	out	slv ( P1WIDTH_G- 1 downto 0 )
DEQ	in	sl
EMPTY_N	out	sl
CLR	in	sl

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The documentation for this design unit was generated from the following file:

• ethernet/RoCEv2/blue-lib/SizedFIFO.vhd