SelectioDeserLane7Series.mapping Architecture Reference

Architecture >> SelectioDeserLane7Series::mapping

Signals
rx	sl
rxDly	sl
clkx4L	sl

Attributes
IODELAY_GROUP	string
IODELAY_GROUP	label is IODELAY_GROUP_G

Instantiations
u_ibufds	ibufds
u_delay	idelaye2
u_iserdes	iserdese2

---

The documentation for this design unit was generated from the following file:

• xilinx/7Series/general/rtl/SelectioDeserLane7Series.vhd