SaltTxLvds Entity Reference

Inheritance diagram for SaltTxLvds:

Collaboration diagram for SaltTxLvds:

Entities
SaltTxLvds.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
Code8b10bPkg	Package <Code8b10bPkg>

Generics
TPD_G	time := 1 ns
SIM_DEVICE_G	string := " ULTRASCALE "

Ports
clk125MHz	in	sl
rst125MHz	in	sl
clk156MHz	in	sl
rst156MHz	in	sl
clk625MHz	in	sl
txEn	in	sl
txData	in	slv ( 7 downto 0 )
txP	out	sl
txN	out	sl

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The documentation for this design unit was generated from the following file:

• protocols/salt/rtl/SaltTxLvds.vhd