SURF
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RoguePgp2fcSim Entity Reference
+ Inheritance diagram for RoguePgp2fcSim:
+ Collaboration diagram for RoguePgp2fcSim:

Entities

RoguePgp2fcSim.sim  architecture
 

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>
AxiStreamPkg  Package <AxiStreamPkg>
Pgp2fcPkg  Package <Pgp2fcPkg>
SsiPkg  Package <SsiPkg>

Generics

TPD_G  time := 1 ns
FC_WORDS_G  integer range 1 to 8 := 1
PORT_NUM_G  natural range 1024 to 49151 := 9000
NUM_VC_G  integer range 1 to 16 := 4

Ports

pgpClk   in   sl
pgpClkRst   in   sl
pgpRxIn   in   Pgp2fcRxInType
pgpRxOut   out   Pgp2fcRxOutType
pgpTxIn   in   Pgp2fcTxInType
pgpTxOut   out   Pgp2fcTxOutType
pgpTxMasters   in   AxiStreamMasterArray ( NUM_VC_G- 1 downto 0 )
pgpTxSlaves   out   AxiStreamSlaveArray ( NUM_VC_G- 1 downto 0 )
pgpRxMasters   out   AxiStreamMasterArray ( NUM_VC_G- 1 downto 0 )
pgpRxSlaves   in   AxiStreamSlaveArray ( NUM_VC_G- 1 downto 0 )

The documentation for this design unit was generated from the following file: