PgpGtyCoreWrapper.mapping Architecture Reference

Architecture >> PgpGtyCoreWrapper::mapping

Components
PgpGtyCore

Signals
drpAddr	slv ( 9 downto 0 )
drpDi	slv ( 15 downto 0 )
drpDo	slv ( 15 downto 0 )
drpEn	sl
drpWe	sl
drpRdy	sl
dummy0_6	slv ( 5 downto 0 )
dummy1_14	slv ( 13 downto 0 )
dummy2_14	slv ( 13 downto 0 )
dummy3_6	slv ( 5 downto 0 )
dummy4_1	sl
dummy5_1	sl
txctrl2	slv ( 7 downto 0 )

Instantiations
u_pgpgtycore	pgpgtycore
u_axilitetodrp_1	AxiLiteToDrp <Entity AxiLiteToDrp>

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The documentation for this design unit was generated from the following file:

• protocols/pgp/pgp2b/gtyUltraScale+/rtl/PgpGtyCoreWrapper.vhd