Pgp4RxEb Entity Reference

Inheritance diagram for Pgp4RxEb:

Collaboration diagram for Pgp4RxEb:

Entities
Pgp4RxEb.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
Pgp4Pkg	Package <Pgp4Pkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '
RST_ASYNC_G	boolean := false

Ports
phyRxClk	in	sl
phyRxRst	in	sl
phyRxValid	in	sl
phyRxData	in	slv ( 63 downto 0 )
phyRxHeader	in	slv ( 1 downto 0 )
pgpRxClk	in	sl
pgpRxRst	in	sl
pgpRxValid	out	sl
pgpRxData	out	slv ( 63 downto 0 )
pgpRxHeader	out	slv ( 1 downto 0 )
remLinkData	out	slv ( 47 downto 0 )
overflow	out	sl
linkError	out	sl
status	out	slv ( 8 downto 0 )

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Pgp4RxEb.vhd
• protocols/pgp/pgp4/core/rtl/Pgp4RxEb.vhd