Pgp3RxGearboxAligner.rtl Architecture Reference

Architecture >> Pgp3RxGearboxAligner::rtl

Processes
comb	( r , rst , rxHeader , rxHeaderValid )
seq	( clk , rst )
comb	( r , rst , rxHeader , rxHeaderValid )
seq	( clk , rst )

Constants
GOOD_COUNT_C	integer := 128
BAD_COUNT_C	integer := 16
GOOD_COUNT_WIDTH_C	integer := log2 ( maximum ( GOOD_COUNT_C , SLIP_WAIT_G ) )
REG_INIT_C	RegType := ( state = > UNLOCKED_S , goodCount = > ( others = > ' 0 ' ) , badCount = > ( others = > ' 0 ' ) , slip = > ' 0 ' , locked = > ' 0 ' )

Types
StateType	( UNLOCKED_S , SLIP_WAIT_S , LOCKED_S )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Pgp3RxGearboxAligner.vhd
• protocols/pgp/pgp3/core/rtl/Pgp3RxGearboxAligner.vhd