Pgp2fcRxPhy.Pgp2fcRxPhy Architecture Reference

Architecture >> Pgp2fcRxPhy::Pgp2fcRxPhy

Processes
PROCESS_317	( pgpRxClk , pgpRxClkRst )
PROCESS_318	( curState , dly1RxDecErr , dly1RxDispErr , ltsCnt , phyRxReady , rxDetectInvert , rxDetectLts , rxDetectLtsOk , stateCnt )
PROCESS_319	( pgpRxClk , pgpRxClkRst )
PROCESS_320	( intRxLinkReady , pgpRxClk , pgpRxClkRst )
PROCESS_321	( pgpRxClk , pgpRxClkRst )
PROCESS_322	( dly0RxData , dly0RxDataK , dly0RxDecErr , dly0RxDispErr , dly1RxData , dly1RxDataK , dly1RxDecErr , dly1RxDispErr )

Types
FsmState	( ST_RESET_C , ST_LOCK_C , ST_WAIT_C , ST_INVRT_C , ST_READY_C )

Signals
dly0RxData	slv ( 15 downto 0 ) := ( others = > ' 0 ' )
dly0RxDataK	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
dly0RxDispErr	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
dly0RxDecErr	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
dly1RxData	slv ( 15 downto 0 ) := ( others = > ' 0 ' )
dly1RxDataK	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
dly1RxDispErr	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
dly1RxDecErr	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
rxDetectLts	sl := ' 0 '
rxDetectLtsOk	sl := ' 0 '
rxDetectLtsRaw	sl
rxDetectInvert	sl := ' 0 '
rxDetectInvertRaw	sl
rxDetectRemLink	sl := ' 0 '
rxDetectRemData	slv ( 7 downto 0 ) := ( others = > ' 0 ' )
rxDetectFcWordEnRaw	sl
rxDetectSOC	sl := ' 0 '
rxDetectSOCRaw	sl
rxDetectSOF	sl := ' 0 '
rxDetectSOFRaw	sl
rxDetectEOC	sl := ' 0 '
rxDetectEOCRaw	sl
rxDetectEOF	sl := ' 0 '
rxDetectEOFRaw	sl
rxDetectEOFE	sl := ' 0 '
rxDetectEOFERaw	sl
nxtRxLinkReady	sl
stateCntRst	sl
stateCnt	slv ( 19 downto 0 ) := ( others = > ' 0 ' )
ltsCntRst	sl
ltsCntEn	sl
ltsCnt	slv ( 7 downto 0 ) := ( others = > ' 0 ' )
intRxLinkReady	sl := ' 0 '
dlyRxLinkDown	sl := ' 0 '
intRxLinkError	sl := ' 0 '
dlyRxLinkError	sl := ' 0 '
intRxInit	sl := ' 0 '
nxtRxInit	sl
intFcValid	sl := ' 0 '
intFcBusy	sl := ' 0 '
intFcError	sl := ' 0 '
fcWordCounter	integer range 0 to FC_WORDS_G := 0
fcWordBuffer	slv ( 16 * FC_WORDS_G- 1 downto 0 ) := ( others = > ' 0 ' )
crcRst	sl
crcEn	sl
crcDataIn	slv ( 15 downto 0 )
crcOut	slv ( 7 downto 0 )
curState	FsmState := ST_LOCK_C
nxtState	FsmState

Instantiations
u_crc7	CRC7Rtl <Entity CRC7Rtl>

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The documentation for this design unit was generated from the following file:

• protocols/pgp/pgp2fc/core/rtl/Pgp2fcRxPhy.vhd