Mux Entity Reference

Entities
Mux.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
numeric_std
StdRtlPkg	Package <StdRtlPkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '
RST_ASYNC_G	boolean := false
REG_DIN_G	boolean := true
REG_SEL_G	boolean := true
REG_DOUT_G	boolean := true
SEL_WIDTH_G	positive := 5

Ports
clk	in	sl
rst	in	sl := not ( RST_POLARITY_G )
sel	in	slv ( SEL_WIDTH_G- 1 downto 0 )
din	in	slv ( 2 ** SEL_WIDTH_G- 1 downto 0 )
dout	out	sl

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The documentation for this design unit was generated from the following files:

• base/general/rtl/Mux.vhd
• build/SRC_VHDL/surf/Mux.vhd