JesdLmfcGen.rtl Architecture Reference

Architecture >> JesdLmfcGen::rtl

Processes
comb	( nSync_i , r , rst , sysref_i )
seq	( clk )
comb	( nSync_i , r , rst , sysref_i )
seq	( clk )

Constants
PERIOD_C	positive := ( ( K_G* F_G ) / GT_WORD_SIZE_C ) - 1
CNT_WIDTH_C	positive := bitSize ( PERIOD_C )
REG_INIT_C	RegType := ( sysrefD1 = > ' 0 ' , cnt = > ( others = > ' 0 ' ) , lmfc = > ' 0 ' , sysrefRe = > ' 0 ' )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/JesdLmfcGen.vhd
• protocols/jesd204b/rtl/JesdLmfcGen.vhd