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Jesd204bPkg Package Reference
Package >> Jesd204bPkg

Functions

std_logic   detKcharFunc (
data_slv: in slv
charisk_slv: in slv
bytes_int: in positive
)
std_logic   varIndexOutFunc ( shft_slv: in slv , index_slv: in slv )
std_logic_vector   detectPosFuncSwap (
data_slv: in slv
charisk_slv: in slv
bytes_int: in positive
)
std_logic_vector   detectPosFunc (
data_slv: in slv
charisk_slv: in slv
bytes_int: in positive
)
std_logic_vector   byteSwapSlv ( data_slv: in slv , bytes_int: in positive )
std_logic_vector   endianSwapSlv ( data_slv: in slv , bytes_int: in positive )
std_logic_vector   JesdDataAlign (
data_slv: in slv
position_slv: in slv
bytes_int: in positive
)
std_logic_vector   JesdCharAlign (
char_slv: in slv
position_slv: in slv
bytes_int: in positive
)
integer   slvToInt ( data_slv: in slv )
std_logic_vector   intToSlv ( data_int: in integer , bytes_int: in positive )
std_logic_vector   outSampleZero ( F_int: in positive , bytes_int: in positive )
std_logic_vector   invSigned ( input: in slv )
std_logic_vector   invData (
data: in slv
F_int: in positive
bytes_int: in positive
)
std_logic   detKcharFunc (
data_slv: in slv
charisk_slv: in slv
bytes_int: in positive
)
std_logic   varIndexOutFunc ( shft_slv: in slv , index_slv: in slv )
std_logic_vector   detectPosFuncSwap (
data_slv: in slv
charisk_slv: in slv
bytes_int: in positive
)
std_logic_vector   detectPosFunc (
data_slv: in slv
charisk_slv: in slv
bytes_int: in positive
)
std_logic_vector   byteSwapSlv ( data_slv: in slv , bytes_int: in positive )
std_logic_vector   endianSwapSlv ( data_slv: in slv , bytes_int: in positive )
std_logic_vector   JesdDataAlign (
data_slv: in slv
position_slv: in slv
bytes_int: in positive
)
std_logic_vector   JesdCharAlign (
char_slv: in slv
position_slv: in slv
bytes_int: in positive
)
integer   slvToInt ( data_slv: in slv )
std_logic_vector   intToSlv ( data_int: in integer , bytes_int: in positive )
std_logic_vector   outSampleZero ( F_int: in positive , bytes_int: in positive )
std_logic_vector   invSigned ( input: in slv )
std_logic_vector   invData (
data: in slv
F_int: in positive
bytes_int: in positive
)

Procedures

  jesdScrambler(
dataIn: in slv ( 15 downto 0 )
lfsrIn: in slv ( 14 downto 0 )
dataOut: inout slv ( 15 downto 0 )
lfsrOut: inout slv ( 14 downto 0 )
)
  jesdScrambler(
dataIn: in slv ( 15 downto 0 )
lfsrIn: in slv ( 14 downto 0 )
dataOut: inout slv ( 15 downto 0 )
lfsrOut: inout slv ( 14 downto 0 )
)

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
numeric_std 
StdRtlPkg  Package <StdRtlPkg>

Constants

GT_WORD_SIZE_C  positive := 4
K_CHAR_C  slv ( 7 downto 0 ) := x " BC "
R_CHAR_C  slv ( 7 downto 0 ) := x " 1C "
A_CHAR_C  slv ( 7 downto 0 ) := x " 7C "
F_CHAR_C  slv ( 7 downto 0 ) := x " FC "
SYSRF_DLY_WIDTH_C  positive := 8
RX_STAT_WIDTH_C  positive := 19 + 2 * GT_WORD_SIZE_C
TX_STAT_WIDTH_C  positive := 6
AXI_PACKET_SIZE_DEFAULT_C  slv ( 23 downto 0 ) := x " 00_01_00 "
PER_STEP_WIDTH_C  positive := 16
JESD_PRBS_TAPS_C  NaturalArray := ( 0 = > 14 , 1 = > 15 )
JESD_GT_RX_LANE_INIT_C  JesdGtRxLaneType := ( data = > ( others = > ' 0 ' ) , dataK = > ( others = > ' 0 ' ) , dispErr = > ( others = > ' 0 ' ) , decErr = > ( others = > ' 0 ' ) , rstDone = > ' 0 ' , cdrStable = > ' 0 ' )
JESD_GT_TX_LANE_INIT_C  JesdGtTxLaneType := ( data = > ( others = > ' 0 ' ) , dataK = > ( others = > ' 0 ' ) )

Types

JesdGtRxLaneTypeArray  array ( natural range <> ) of JesdGtRxLaneType
JesdGtTxLaneTypeArray  array ( natural range <> ) of JesdGtTxLaneType
FixLatDataArray  array ( natural range <> ) of slv ( ( GT_WORD_SIZE_C* 8 + GT_WORD_SIZE_C* 2 ) - 1 downto 0 )
SampleDataArray  array ( natural range <> ) of slv ( ( GT_WORD_SIZE_C* 8 ) - 1 downto 0 )
SampleDataVectorArray  array ( natural range <> , natural range <> ) of slv ( ( GT_WORD_SIZE_C* 8 ) - 1 downto 0 )
RxStatuRegisterArray  array ( natural range <> ) of slv ( ( RX_STAT_WIDTH_C ) - 1 downto 0 )
TxStatuRegisterArray  array ( natural range <> ) of slv ( ( TX_STAT_WIDTH_C ) - 1 downto 0 )
AlignTxArray  array ( natural range <> ) of slv ( ( GT_WORD_SIZE_C ) - 1 downto 0 )

Records

JesdGtRxLaneType 
JesdGtTxLaneType 
The documentation for this design unit was generated from the following files: