I2cRegSlave.rtl Architecture Reference

Architecture >> I2cRegSlave::rtl

Functions
integer	getIndex ( byteCount: in unsigned , totalBytes: in positive )
integer	getIndex ( byteCount: in unsigned , totalBytes: in positive )

Processes
comb	( i2cSlaveOut , r , rdData , sRst )
seq	( aRst , clk )
comb	( i2cSlaveOut , r , rdData , sRst )
seq	( aRst , clk )

Constants
REG_INIT_C	RegType := ( state = > IDLE_S , byteCnt = > ( others = > ' 0 ' ) , addr = > ( others = > ' 0 ' ) , wrEn = > ' 0 ' , wrData = > ( others = > ' 0 ' ) , rdEn = > ' 0 ' , i2cSlaveIn = > I2C_SLAVE_IN_INIT_C )

Types
StateType	( IDLE_S , ADDR_S , WRITE_DATA_S , READ_DATA_S )

Signals
r	RegType := REG_INIT_C
rin	RegType
i2cSlaveOut	I2cSlaveOutType
i2cSlaveIn	I2cSlaveInType

Records
RegType

Instantiations
i2cslave_1	I2cSlave <Entity I2cSlave>
i2cslave_1	I2cSlave <Entity I2cSlave>

---

The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/I2cRegSlave.vhd
• protocols/i2c/rtl/I2cRegSlave.vhd