I2cRegSlave Entity Reference

Inheritance diagram for I2cRegSlave:

Collaboration diagram for I2cRegSlave:

Entities
I2cRegSlave.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
numeric_std
StdRtlPkg	Package <StdRtlPkg>
I2cPkg	Package <I2cPkg>

Generics
TPD_G	time := 1 ns
TENBIT_G	integer range 0 to 1 := 0
I2C_ADDR_G	integer range 0 to 1023 := 0
OUTPUT_EN_POLARITY_G	integer range 0 to 1 := 0
FILTER_G	integer range 2 to 512 := 4
ADDR_SIZE_G	natural := 2
DATA_SIZE_G	positive := 1
ADDR_AUTO_INC_G	boolean := true
ENDIANNESS_G	integer range 0 to 1 := 0

Ports
sRst	in	sl := ' 0 '
aRst	in	sl := ' 0 '
clk	in	sl
addr	out	slv ( ( 8 * ADDR_SIZE_G ) - 1 downto 0 )
wrEn	out	sl
wrData	out	slv ( ( 8 * DATA_SIZE_G ) - 1 downto 0 )
rdEn	out	sl
rdData	in	slv ( ( 8 * DATA_SIZE_G ) - 1 downto 0 )
i2ci	in	i2c_in_type
i2co	out	i2c_out_type

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/I2cRegSlave.vhd
• protocols/i2c/rtl/I2cRegSlave.vhd