Architecture >> I2cRegMasterAxiBridge::rtl

Functions
I2cRegMasterInType	setI2cRegMaster ( i: in integer , readN: in boolean )	[ impure ]
I2cRegMasterInType	setI2cRegMaster ( i: in integer , readN: in boolean )	[ impure ]

Processes
comb	( axiReadMaster , axiRst , axiWriteMaster , i2cRegMasterOut , r )
seq	( axiClk )
comb	( axiReadMaster , axiRst , axiWriteMaster , i2cRegMasterOut , r )
seq	( axiClk )

Constants
READ_C	boolean := false
WRITE_C	boolean := true
DEVICE_MAP_LENGTH_C	natural := DEVICE_MAP_G ' length
I2C_REG_ADDR_SIZE_C	natural := maxAddrSize ( DEVICE_MAP_G )
I2C_REG_AXI_ADDR_LOW_C	natural := 2
I2C_REG_AXI_ADDR_HIGH_C	natural := ite ( I2C_REG_ADDR_SIZE_C = 0 , 2 , I2C_REG_AXI_ADDR_LOW_C+ I2C_REG_ADDR_SIZE_C- 1 )
I2C_DEV_AXI_ADDR_LOW_C	natural := I2C_REG_AXI_ADDR_HIGH_C+ 1
I2C_DEV_AXI_ADDR_HIGH_C	natural := ite ( ( DEVICE_MAP_LENGTH_C = 1 ) , I2C_DEV_AXI_ADDR_LOW_C , ( I2C_DEV_AXI_ADDR_LOW_C+ log2 ( DEVICE_MAP_LENGTH_C ) - 1 ) )
REG_INIT_C	RegType := ( axiReadSlave = > AXI_LITE_READ_SLAVE_INIT_C , axiWriteSlave = > AXI_LITE_WRITE_SLAVE_INIT_C , i2cSelectOut = > ( others = > ' 0 ' ) , i2cRegMasterIn = > I2C_REG_MASTER_IN_INIT_C )

Subtypes
I2C_REG_AXI_ADDR_RANGE_C	natural range I2C_REG_AXI_ADDR_HIGH_C downto I2C_REG_AXI_ADDR_LOW_C
I2C_DEV_AXI_ADDR_RANGE_C	natural range I2C_DEV_AXI_ADDR_HIGH_C downto I2C_DEV_AXI_ADDR_LOW_C

Records
RegType

The documentation for this design unit was generated from the following files:

Functions

Processes