Gtp7TxManualPhaseAligner.rtl Architecture Reference

Architecture >> Gtp7TxManualPhaseAligner::rtl

Processes
comb	( gtTxDlySResetDoneSync , gtTxPhAlignDoneEdge , gtTxPhInitDoneSync , r , resetPhAlignment , runPhAlignment )
seq	( stableClk )

Constants
REG_RESET_C	RegType := ( state = > INIT_S , phaseAlignmentDone = > ' 0 ' , gtTxDlySReset = > ' 0 ' , gtTxPhInit = > ' 0 ' , gtTxPhAlign = > ' 0 ' , gtTxDlyEn = > ' 0 ' )

Types
StateType	( INIT_S , WAIT_DLY_SRESET_DONE_S , WAIT_PH_INIT_DONE_S , WAIT_PH_ALIGN_DONE_S , WAIT_PH_ALIGN_DONE_2_S , DONE_S )

Signals
r	RegType := REG_RESET_C
rin	RegType
gtTxDlySResetDoneSync	sl
gtTxPhInitDoneSync	sl
gtTxPhAlignDoneSync	sl
gtTxPhAlignDoneEdge	sl

Records
RegType

Instantiations
tx_dly_s_reset_done_sync	Synchronizer <Entity Synchronizer>
tx_ph_init_done_sync	Synchronizer <Entity Synchronizer>
tx_ph_align_done_sync	SynchronizerEdge <Entity SynchronizerEdge>

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The documentation for this design unit was generated from the following file:

• xilinx/7Series/gtp7/rtl/Gtp7TxManualPhaseAligner.vhd