EthCrc32Parallel Entity Reference

Inheritance diagram for EthCrc32Parallel:

Collaboration diagram for EthCrc32Parallel:

Entities
EthCrc32Parallel.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
EthCrc32Pkg	Package <EthCrc32Pkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '
USE_DSP_G	boolean := false
CRC_INIT_G	slv ( 31 downto 0 ) := x " FFFFFFFF "
BYTE_WIDTH_G	positive range 1 to 16 := 16

Ports
crcClk	in	sl
crcReset	in	sl
crcDataValid	in	sl
crcDataWidth	in	slv ( 3 downto 0 )
crcIn	in	slv ( ( BYTE_WIDTH_G* 8 - 1 ) downto 0 )
crcOut	out	slv ( 31 downto 0 )

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The documentation for this design unit was generated from the following file:

• ethernet/EthMacCore/rtl/EthCrc32Parallel.vhd