Debouncer.rtl Architecture Reference

Architecture >> Debouncer::rtl

Processes
comb	( iSynced , r , rst )
seq	( clk , rst )
comb	( iSynced , r , rst )
seq	( clk , rst )

Constants
CLK_PERIOD_C	real := 1 . 0 / CLK_FREQ_G
CNT_MAX_C	natural := getTimeRatio ( DEBOUNCE_PERIOD_G , CLK_PERIOD_C ) - 1
POLARITY_EQ_C	boolean := ite ( INPUT_POLARITY_G = OUTPUT_POLARITY_G , true , false )
SYNC_INIT_C	slv ( 1 downto 0 ) := ( others = >not INPUT_POLARITY_G )
REG_RESET_C	RegType := ( filter = > 0 , iSyncedDly = >not INPUT_POLARITY_G , o = >not OUTPUT_POLARITY_G )

Signals
r	RegType := REG_RESET_C
rin	RegType
iSynced	sl := INPUT_POLARITY_G

Records
RegType

Instantiations
synchronizer_1	Synchronizer <Entity Synchronizer>
synchronizer_1	Synchronizer <Entity Synchronizer>

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The documentation for this design unit was generated from the following files:

• base/general/rtl/Debouncer.vhd
• build/SRC_VHDL/surf/Debouncer.vhd