Architecture >> CoaXPressRxLane::rtl
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slv | cxpCrcUpdate ( crcIn: in slv( 31 downto 0) , data: in slv( 31 downto 0) ) |
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slv | cxpCrcFinal ( crcIn: in slv( 31 downto 0) ) |
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comb | ( r , rxData , rxDataK , rxLinkUp , rxRst ) |
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seq | ( rxClk ) |
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REG_INIT_C | RegType := ( errDet = > ' 0 ' , ioAck = > ' 0 ' , eventAck = > ' 0 ' , eventTag = > ( others = > ' 0 ' ) , ackCnt = > 0 , streamID = > ( others = > ' 0 ' ) , packetTag = > ( others = > ' 0 ' ) , dsize = > ( others = > ' 0 ' ) , dcnt = > ( others = > ' 0 ' ) , dbgCnt = > ( others = > ' 0 ' ) , crc = > ( others = > ' 1 ' ) , cfgMaster = > AXI_STREAM_MASTER_INIT_C , dataMaster = > AXI_STREAM_MASTER_INIT_C , heatbeatMaster = > AXI_STREAM_MASTER_INIT_C , saved = > IDLE_S , state = > IDLE_S ) |
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StateType | ( IO_ACK_S , IDLE_S , TYPE_S , CTRL_ACK_TAG_S , CTRL_ACK_S , HEARTBEAT_S , EVENT_ACK_S , EVENT_DSIZE_UPPER_S , EVENT_DSIZE_LOWER_S , EVENT_PAYLOAD_S , EVENT_CRC_S , EVENT_EOP_S , STREAM_ID_S , PACKET_TAG_S , DSIZE_UPPER_S , DSIZE_LOWER_S , STREAM_DATA_S ) |
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r | RegType := REG_INIT_C |
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rin | RegType |
The documentation for this design unit was generated from the following file:
- protocols/coaxpress/core/rtl/CoaXPressRxLane.vhd
1.9.8