ClinkUart Entity Reference

Inheritance diagram for ClinkUart:

Collaboration diagram for ClinkUart:

Entities
ClinkUart.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
SsiPkg	Package <SsiPkg>

Generics
TPD_G	time := 1 ns
UART_READY_EN_G	boolean := true
UART_AXIS_CONFIG_G	AxiStreamConfigType

Ports
intClk	in	sl
intRst	in	sl
baud	in	slv ( 23 downto 0 )
throttle	in	slv ( 15 downto 0 )
uartClk	in	sl
uartRst	in	sl
sUartMaster	in	AxiStreamMasterType
sUartSlave	out	AxiStreamSlaveType
sUartCtrl	out	AxiStreamCtrlType
mUartMaster	out	AxiStreamMasterType
mUartSlave	in	AxiStreamSlaveType
rxIn	in	sl
txOut	out	sl

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The documentation for this design unit was generated from the following file:

• protocols/clink/rtl/ClinkUart.vhd