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Processes
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Signals
CRC7Rtl.imp_crc Architecture Reference
Architecture >>
CRC7Rtl::imp_crc
Processes
PROCESS_301
(
clk
)
Signals
lfsr_q
std_logic_vector
(
7
downto
0
)
:
=
(
others
=
>
'
0
'
)
lfsr_c
std_logic_vector
(
7
downto
0
)
:
=
(
others
=
>
'
0
'
)
The documentation for this design unit was generated from the following file:
protocols/pgp/pgp2fc/core/rtl/
CRC7Rtl.vhd
CRC7Rtl
imp_crc
Generated by
1.9.8