CRC32Rtl.rtl Architecture Reference

Architecture >> CRC32Rtl::rtl

Processes
PROCESS_28	( CRCCLK , CRCCLKEN )
CRCP	( CRCCLK , CRCINIT , CRCRESET )
PROCESS_102	( CRCCLK , CRCCLKEN )
CRCP	( CRCCLK , CRCINIT , CRCRESET )

Constants
Polyval	slv ( 31 downto 0 ) := X " 04C11DB7 "

Types
FbArray	( 32 downto 0 ) slv ( 31 downto 0 )

Signals
data	slv ( 31 downto 0 )
crc	slv ( 31 downto 0 )
CRCDATAVALID_d	sl
CRCDATAWIDTH_d	slv ( 2 downto 0 )
MSBVect	FbArray
TempXOR	FbArray

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The documentation for this design unit was generated from the following files:

• base/crc/rtl/CRC32Rtl.vhd
• build/SRC_VHDL/surf/CRC32Rtl.vhd