BoxcarFilterTb.testbed Architecture Reference

Architecture >> BoxcarFilterTb::testbed

Processes
comb	( r , rst )
seq	( clk )
comb	( r , rst )
seq	( clk )

Constants
TPD_G	time := 2 . 5 ns
REG_INIT_C	RegType := ( ibValid = > ' 0 ' , ibData = > ( others = > ' 0 ' ) )

Signals
r	RegType := REG_INIT_C
rin	RegType
clk	sl := ' 0 '
rst	sl := ' 0 '
obValid	sl := ' 0 '
obData	slv ( 15 downto 0 ) := x " 0000 "

Records
RegType

Instantiations
u_clkrst	ClkRst <Entity ClkRst>
u_boxcarfilter	BoxcarFilter <Entity BoxcarFilter>
u_clkrst	ClkRst <Entity ClkRst>
u_boxcarfilter	BoxcarFilter <Entity BoxcarFilter>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/BoxcarFilterTb.vhd
• dsp/generic/tb/BoxcarFilterTb.vhd