AxiWriteEmulate Entity Reference

Inheritance diagram for AxiWriteEmulate:

Collaboration diagram for AxiWriteEmulate:

Entities
AxiWriteEmulate.structure	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
TextUtilPkg	Package <TextUtilPkg>
StdRtlPkg	Package <StdRtlPkg>
AxiPkg	Package <AxiPkg>

Generics
TPD_G	time := 1 ns
LATENCY_G	natural := 31
AXI_CONFIG_G	AxiConfigType
SIM_DEBUG_G	boolean := false

Ports
axiClk	in	sl
axiRst	in	sl
axiWriteMaster	in	AxiWriteMasterType
axiWriteSlave	out	AxiWriteSlaveType

---

The documentation for this design unit was generated from the following files:

• axi/axi4/rtl/AxiWriteEmulate.vhd
• build/SRC_VHDL/surf/AxiWriteEmulate.vhd