AxiStreamTrailerAppend Entity Reference

Inheritance diagram for AxiStreamTrailerAppend:

Collaboration diagram for AxiStreamTrailerAppend:

Entities
AxiStreamTrailerAppend.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>

Generics
TPD_G	time := 1 ns
RST_ASYNC_G	boolean := false
PIPE_STAGES_G	natural := 0
TRAILER_AXI_CONFIG_G	AxiStreamConfigType
MASTER_SLAVE_AXI_CONFIG_G	AxiStreamConfigType

Ports
axisClk	in	sl
axisRst	in	sl
sAxisMaster	in	AxiStreamMasterType
sAxisSlave	out	AxiStreamSlaveType
sAxisTrailerMaster	in	AxiStreamMasterType
sAxisTrailerSlave	out	AxiStreamSlaveType
mAxisMaster	out	AxiStreamMasterType
mAxisSlave	in	AxiStreamSlaveType

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The documentation for this design unit was generated from the following files:

• axi/axi-stream/rtl/AxiStreamTrailerAppend.vhd
• build/SRC_VHDL/surf/AxiStreamTrailerAppend.vhd