AxiStreamGearboxUnpack Entity Reference

Entities
AxiStreamGearboxUnpack.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
SsiPkg	Package <SsiPkg>

Generics
TPD_G	time := 1 ns
RST_ASYNC_G	boolean := false
AXI_STREAM_CONFIG_G	AxiStreamConfigType
RANGE_HIGH_G	integer := 119
RANGE_LOW_G	integer := 8

Ports
axisClk	in	sl
axisRst	in	sl
packedAxisMaster	in	AxiStreamMasterType
packedAxisSlave	out	AxiStreamSlaveType
packedAxisCtrl	out	AxiStreamCtrlType
rawAxisMaster	out	AxiStreamMasterType
rawAxisSlave	in	AxiStreamSlaveType
rawAxisCtrl	in	AxiStreamCtrlType

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The documentation for this design unit was generated from the following files:

• axi/axi-stream/rtl/AxiStreamGearboxUnpack.vhd
• build/SRC_VHDL/surf/AxiStreamGearboxUnpack.vhd