AxiStreamBytePacker Entity Reference

Inheritance diagram for AxiStreamBytePacker:

Entities
AxiStreamBytePacker.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>

Generics
TPD_G	time := 1 ns
RST_ASYNC_G	boolean := false
SLAVE_CONFIG_G	AxiStreamConfigType
MASTER_CONFIG_G	AxiStreamConfigType

Ports
axiClk	in	sl
axiRst	in	sl
sAxisMaster	in	AxiStreamMasterType
mAxisMaster	out	AxiStreamMasterType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/AxiStreamBytePacker.vhd
• protocols/packetizer/rtl/AxiStreamBytePacker.vhd