AxiI2cEeprom Entity Reference

Inheritance diagram for AxiI2cEeprom:

Collaboration diagram for AxiI2cEeprom:

Entities
AxiI2cEeprom.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
StdRtlPkg	Package <StdRtlPkg>
AxiLitePkg	Package <AxiLitePkg>
I2cPkg	Package <I2cPkg>

Generics
TPD_G	time := 1 ns
AXIL_PROXY_G	boolean := false
ADDR_WIDTH_G	positive := 16
POLL_TIMEOUT_G	positive := 16
I2C_ADDR_G	slv ( 6 downto 0 ) := " 1010000 "
I2C_SCL_FREQ_G	real := 100 . 0E + 3
I2C_MIN_PULSE_G	real := 100 . 0E - 9
AXI_CLK_FREQ_G	real := 156 . 25E + 6

Ports
scl	inout	sl
sda	inout	sl
axilReadMaster	in	AxiLiteReadMasterType
axilReadSlave	out	AxiLiteReadSlaveType
axilWriteMaster	in	AxiLiteWriteMasterType
axilWriteSlave	out	AxiLiteWriteSlaveType
axilClk	in	sl
axilRst	in	sl

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/AxiI2cEeprom.vhd
• protocols/i2c/axi/AxiI2cEeprom.vhd