AxiDac7654Spi Entity Reference

Inheritance diagram for AxiDac7654Spi:

Entities
AxiDac7654Spi.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
AxiDac7654Pkg	Package <AxiDac7654Pkg>

Generics
TPD_G	time := 1 ns
AXI_CLK_FREQ_G	real := 125 . 0E + 6

Ports
spiIn	in	AxiDac7654SpiInType
spiOut	out	AxiDac7654SpiOutType
dacCs	out	sl
dacSck	out	sl
dacSdi	out	sl
dacSdo	in	sl
dacLoad	out	sl
dacLdac	out	sl
dacRst	out	sl
axiClk	in	sl
axiRst	in	sl

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The documentation for this design unit was generated from the following file:

• devices/Ti/dac7654/rtl/AxiDac7654Spi.vhd