AdcDdrDeserializerUltraScale.rtl Architecture Reference

Architecture >> AdcDdrDeserializerUltraScale::rtl

Constants
ISERDES_WIDTH_C	positive := ite ( SERIALIZATION_FACTOR_G< = 6 , 4 , 8 )

Signals
delayedData	sl
rawData	slv ( 7 downto 0 )
gearboxData	slv ( SERIALIZATION_FACTOR_G- 1 downto 0 )

Instantiations
u_delay	Idelaye3Wrapper <Entity Idelaye3Wrapper>
u_deserializer	iserdese3
u_gearbox	Gearbox <Entity Gearbox>

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The documentation for this design unit was generated from the following file:

• devices/AnalogDevices/adcDdr/UltraScale/rtl/AdcDdrDeserializerUltraScale.vhd